High Tech

Networking solutions provider Brocade opened its 75,000-sf R&D laboratory and data center in August of 2010 in San Jose, Calif. Five engineering labs and three data centers were consolidated with the new facility, resulting in a 37 percent reduction in energy consumption and eliminating 4,450 tons of CO2 emissions annually. The data center has a calculated Power Usage Effectiveness (PUE) metric of 1.3, while comparable data centers usually have a PUE greater than 1.5.

Taiwan Semiconductor Manufacturing Company broke ground on a $9.3 billion chip production plant in Taiwan in July of 2010. Featuring 104,000 sm of cleanroom space, the facility will be able to manufacture chips at the 28 nanometer scale. The construction cost of the facility is estimated at 15 percent of the project cost, with 85 percent of the $9.3 billion funding equipment.

Imec opened its new 300mm cleanroom facility in June of 2010 in Leuven, Belgium. The 10,000-sm project includes a clean processing area of 1,200 sm and 1,600 sm of laboratories for research on biomedical electronics and silicon and organic solar cells. Additionally, Imec will begin construction in fall of 2010 on a 16-story office building designed by Austrian firm Baumschlager-Eberle. The completed Leuven research campus will provide 18,000 sm of cleanroom, laboratory, and office space.

GlobalFoundries will begin construction in June of 2010 on a 90,000-sf expansion of Chip Fab 8. Providing additional cleanroom space, the $75 million project represents an expansion of GlobalFoundries' semiconductor manufacturing center currently under construction at the Luther Forest Technology Campus in Malta, N.Y. Completion is expected in mid-2012. The project will bring the total cleanroom footprint at the Malta fab to 300,000 sf.

Western Digital will build a $1.2 billion R&D and manufacturing facility in Petaling Jaya, Penang. The 1.5 million-sf project is slated for completion in the third quarter of 2011. The facility will develop and produce magnetic heads, media components, and hard disk drives.

Toshiba will begin building Fab 5 in July of 2010. The facility will produce 3000mm NAND flash wafers and is slated for completion by spring of 2011. Fab 5 will be located at Toshiba’s existing manufacturing campus in Yokkaichi, Japan. The facility’s cleanroom will feature waste heat recycling to reduce carbon emissions.

Samsung Electronics is engaged in a $500 million renovation of its chip manufacturing complex in Austin, Texas. The project will join the existing Fab 1 and Fab 2 buildings to create a cleanroom facility for the production NAND flash memory chips. Completion of the first phase is expected by April of 2010.

Globalfoundries is constructing the $4.2 billion Fab 2 in Malta, N.Y. Sited on 223 acres in the Luther Forest Technology Park, the 1.45 million-sf project is comprised of four buildings. Featuring a 300,000-sf Class 100 cleanroom, the chip manufacturing campus will employ over 1,400 people. Construction of Fab 2 will reach completion in 2011 with production commencing in 2012. M+W Zander is providing full architectural, engineering, and construction management services for the project.

Intel Corp. is engaged in a $2.5 million upgrade of the Fab 11X manufacturing complex in Rio Rancho, N.M. The facility will house a 400,000-sf cleanroom and will begin producing 32 nanometer chips in fall of 2010. The building includes a central computer control room to monitor the plant’s advanced manufacturing equipment. Fab 11X was completed in 2002 and was renovated in 2007.

The State University of New York Institute of Technology (SUNYIT) is planning to build the $45 million Computer Chip Commercialization Center in Marcy, N.Y. Created in partnership with University at Albany College of Nanoscale Science & Engineering, the facility will support R&D collaboration with private industry partners. Construction is expected to begin in fall of 2009 and reach completion in 2011.

Intel is investing $3 billion to renovate its chip fabrication facilities in Chandler, Ariz. The project will combine two buildings, Fab 22 and Fab 32, to create an upgraded facility for the manufacture of 32-nanometer chips. The project is expected to reach completion by year-end 2010.

Soitec SA opened its 300-mm wafer fabrication plant in Singapore in November of 2008. Sited on 2.7 hectares at the company’s Pasir Ris campus, the facility houses 4,000-sm of cleanroom space. Construction of the €350 million project began in August of 2006. Soitec SA is a manufacturer of silicon-on-insulator (SOI) wafers headquartered in Bernin, France.

Russian semiconductor manufacturer ANGSTREM-T has selected M + W Zander as project engineer to construct a 200mm wafer production plant at its Zelenograd campus. The 6,000-sm cleanroom facility is slated for completion in late 2009. M +W Zander is based in Germany.

The Bosch Group is building a €550 million fab for 200 millimeter semiconductors in Reutlingen, Germany. The facility began construction in fall of 2007 with production commencing in mid-2009. The plant will be able to produce 1,000 silicon wafers per day and will support Bosch’s automotive electronics business operations, including MEMS and micromachined chip technologies.

Cadence Design Systems broke ground in February 2007 on a five-story, 208,000-sf R&D center in San Jose, Calif. Housing engineering research in integrated circuits and electrical systems for the electronics industry, Building 10 will enable the consolidation of Cadence’s research and development operations in a single collaboration-enhancing technology center.